The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the inventors hereof, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted to be prior art against the present disclosure.
Short-reach data links are sometimes used for chip-to-chip communication when a reliable serial interface using low power at high speed is required. For example, as smaller semiconductor process nodes are developed, the cost of semiconductor devices increases. Therefore, there is an increasing prevalence of electronic devices that include multiple interconnected chips. In some cases, a more advanced process node is used only in an integrated circuit chip on which functions that require fast processing and high power consumption are implemented. Conversely, other less demanding features, such as legacy input/output features and other peripheral features, can be implemented on one or more integrated circuit chips at an older process node. The separate integrated circuit chips are then interconnected using one or more short-reach data links.
One advantage of a short-reach data link is low channel loss (˜−12 dB). With such low channel loss, injection-locked oscillator-based (ILO-based) clock-data recovery (CDR) is practical. However, for ILO-based CDR to function correctly, the ratio of the oscillator free-running frequency (FRF) to the data rate must be kept constant.